1. Field of the Invention
The invention concerns a hot pluggable electrical circuit and in particular a method for hot plugging of an electrical circuit into a separate non-quiesced signal net, such as an active digital or analog bus.
2. Prior Art
Various apparatus and methods for the rapid interconnection of electrical circuits, such as peripheral device interfaces or control circuits to computer busses, are known in the art. In a method to minimize the impact of plugging into a digital bus, the normal procedure has been to disable the bus so that new devices would not disrupt data flow on the bus.
A method and apparatus for controlled removal and insertion of circuit modules which are interconnected by a bus is known from U.S. Pat. No. 4,835,737. According to the teaching of this document, the operation of the bus is inhibited during the period that a module is being inserted into a connector connected to the bus and the bus is reactivated after the module has been inserted. When a module is to be inserted in an associated connector, a switch on the module is operated to provide an inhibit signal via the associated connector to a control circuit which inhibits operation of the bus. Upon full insertion of the module in the associated connector, the switch is operated to a second state in which the inhibit signal to the control circuit is reactivated. As a consequence, the control circuit again enables the bus to perform normal operations. However, quiescing of the bus during the insertion period has serious disadvantages-other than performance problems, since there is no graceful way to manage peripherals or I/O during the quiesce interruption. Also, since parts of a digital system are asynchronous with respect to each other, logical or sequential operation errors are possible. A digital or analog system is interrupted for many cycles because the mechanical insertion of a board is a relatively slow and imprecise event. Therefore, communication or peripheral flow control problems could result in overruns or underruns. As the speed of information transfers increases with the advance of technology, the impact of quiescing the bus during hot plugging becomes more and more severe.
In contrast the hot plugging concept provides both power and data transfer interconnections without causing interruption of ongoing data transfers on the bus. Hot plugging is found in fault tolerant systems which normally include device or field replaceable unit redundancy coupled through operational comparison and checking logic to ensure correct operation, see e.g. U.S. Pat. No. 4,453,215, U.S. Pat. No. 4,497,826, U.S. Pat. No. 4,597,084, and U.S. Pat. No. 4,654,857. When a fault is detected an indication of the failing device is provided to service personnel. The failing device is then simply removed from the bus and a replacement device connected. The removal of the failing device and the replacement of a new device are performed without regard to ongoing bus activity. Both the bus architecture and the control device electronics must be carefully designed to achieve this "hot plugging" capability. One approach allowed insertion to momentarily impact the bus, but relied on bus error recovery to absorb the transient and maintain system operation, as in U.S. Pat. No. 4,433,215. Other designs survive the insertion transients to the point where signal switching was not adversely affected.
From IBM Technical Disclosure Bulletin, Volume 29, No. 7, December 1986, page 2877, a circuitry is known for allowing a data cartridge to be hot plugged into an operating terminal without disrupting terminal operation. Other circuits are included in this circuitry to isolate the cartridge connector from the address, data and control busses to which it is logically connected. The buffer circuits are interposed between the-cartridge connector and the busses-to avoid bus noise. The buffer is kept in a high impedance state unless the presence of a cartridge has been indicated by an interrupt signal provided directly to the micro processor.
Other known prior art approaches (U.S. Pat. No. 4,750,177 and U.S. Pat. No. 4,866,604) required split resistive terminations on the system to terminate the bus and allow faster switching. This was placed on the common printed circuit board that houses the board connectors. It also served to ensure system voltage levels without any system boards present. High current sink drivers/receivers were required, and special layout considerations and limitations were required for this concept to work. The system used overpowered drivers/receivers in conjunction with-the split terminations to "harden" the digital system so that it could withstand the insertion transients.
Another known prior art design sought to minimize the impact and terminate the digital net by using a series resistor on the board to be inserted. The value must be carefully chosen to allow hot plug while not effecting the switching characteristics. The main disadvantages are signal delay-and the loss of signal voltage across the resistor. These systems had to be carefully designed from the beginning so that hot plugging could work reliably. This becomes increasingly difficult as the bus cycle times decrease and logic speeds increase. In this environment it becomes-much more challenging to design a System that can sustain processing and support hot plug. Therefore existing digital or analog systems could not easily be adapted for hot plugging.